I suppose the right side of your picture shows the model description of the part and on the left side the result of a DC simulation is shown. Correct ?
In this case, you cannot expect that ONE parameter of the model (gm) is identical to a parameter which is measured/simulated for the whole part (Yo).
This would be the case only for an oversimplified model (voltage controlled current
source) without a real physical background.
And, in addition, as said in the first reply: The transconductance depends of course on the bias point.
thankyou for attention!
the picture of the right is indeed the model description @ certain DC environment and the picture of the left is DC sweep of gm ,in my opinion, we can read the plot @ the same DC environment the same value as the model description ,but the reslut tell us not, i really can not figure out why?
The Formula gm=Id/V_over (V_over = Vgs-Vt) is not currect for short channel Transistors, and for long channel transistors it is only a good aprox for V_over>>0. I can see in your sumulation that your Baising is in beginning of the transist rigion from Satur. to subTt, try to bias higher like gm/id=7 then you should get closer bout it will be still 20% off, check out Gm/id design Methode, there is a paper from 1996 from a south american guy (forget the name sorry)
As I have mentioned in my first reply (see quote above) , you cannot assume that the internal model parameter gm is identical to the measured external value Yo.