when i simulate a ckt in Spectre, a model library for standard cells is included.
In the model library, ".global VSS VDD" is only in the first line.
After simulated, a error message says that there can be at most one global statement.
I have checked the model library and there is actually only one global statement.
Could you show me your design procedure form the schematic to simulation.
Cause, if you using the spectre for simulation, you don't need to see the staements. Unless you want using Hspice for simulation. If you using Hspice you need the netlist file, then you should be care the .global statement.
Most of the time the globals are named as vdd! and gnd! Those are always used in the libraries. In that case you are claiming another globals VSS and VDD.
Try to replace the VDD and VSS pins by vdd!/gnd! (or actually by vdd/gnd sumbols from analogLib)
I bet it will work then.