shell.albert
Member level 4
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Hi,guys!
I am really not to know how to solve my project problem now.
So I post here for some suggestion from you.Thanks at first.
My project is a video/audio player board, on the board, there are FPGA,ARM and x86.
We build a transparent pass for communicate with x86 and ARM via FPGA.This is mean
that FPGA supply a half-pass for x86 and ARM.I wrote the driver for x86 and ARM.
In x86 endian,connected with FPGA via PCIe bus.In ARM endian,connected with FPGA via SPI.
At the beginning,I wrote the SPI driver by sending data with 32-bit by 32-bit,so the speed
is very low.Hence,I changed the driver code with filling the TXFIFO full then start once SPI
transfer.Now,the speed growes up.From the 3~4kbyte/s to 13~15kbyte/s.This is a success.And
I test the spi driver with basic regiter read and write program. Everything seems works fine.
But the top application which call my spi driver was failed. From the basic theroy,if my spi
driver was tested ok with the test program,so the top application written by others must work
fine.But the real is not.I don't know and I cann't find out where is the error.Could someone
give me suggestions?
Thanks!
- - - Updated - - -
I tested the virtual network driver spend whole morning,about 6 hours. Two sides drivers-x86 endian and arm endian work fine. I ran ping 192.168.10.53 to test the VNIC function while read and write 0x51 register through the same SPI interface. Everything seems ok. I'm doubt . What can I do next? How to solve this error ? Any suggestions ?
- - - Updated - - -
plz see the test pictures from my attached file.
I am really not to know how to solve my project problem now.
So I post here for some suggestion from you.Thanks at first.
My project is a video/audio player board, on the board, there are FPGA,ARM and x86.
We build a transparent pass for communicate with x86 and ARM via FPGA.This is mean
that FPGA supply a half-pass for x86 and ARM.I wrote the driver for x86 and ARM.
In x86 endian,connected with FPGA via PCIe bus.In ARM endian,connected with FPGA via SPI.
At the beginning,I wrote the SPI driver by sending data with 32-bit by 32-bit,so the speed
is very low.Hence,I changed the driver code with filling the TXFIFO full then start once SPI
transfer.Now,the speed growes up.From the 3~4kbyte/s to 13~15kbyte/s.This is a success.And
I test the spi driver with basic regiter read and write program. Everything seems works fine.
But the top application which call my spi driver was failed. From the basic theroy,if my spi
driver was tested ok with the test program,so the top application written by others must work
fine.But the real is not.I don't know and I cann't find out where is the error.Could someone
give me suggestions?
Thanks!
- - - Updated - - -
I tested the virtual network driver spend whole morning,about 6 hours. Two sides drivers-x86 endian and arm endian work fine. I ran ping 192.168.10.53 to test the VNIC function while read and write 0x51 register through the same SPI interface. Everything seems ok. I'm doubt . What can I do next? How to solve this error ? Any suggestions ?
- - - Updated - - -
plz see the test pictures from my attached file.
