Hi
How do we generate 2 at-speed pulses during transition ATPG, if the tester does not support it? is it through OPCG, clock leaker/shaper and so on or s there any other way. Im not sure of the solution for this. can any one help me?
Thank you very much dftrtl. And do you know about OPCG which is used for similar purpose. if so can you let me know .. how OPCG works to generate two clocks... i know how clock shaper works. Want to know if OPCG/OCCG has similar functionality.