suddy72
Member level 2
Hi everyone ,
I am using a XUP Virtex II Pro Eval Board with ISE Foundation.
I want to clock something at double the source clock speed, i have been told that this can be done using a PLL?
Does anyone know how i go about this? can this part be generated using coregen ?
Stuart
I am using a XUP Virtex II Pro Eval Board with ISE Foundation.
I want to clock something at double the source clock speed, i have been told that this can be done using a PLL?
Does anyone know how i go about this? can this part be generated using coregen ?
Stuart