[SOLVED] Generate 15-harmonics cosine wave with different phase shifts

[highstreets]

I'm currently dealing with my final year project that requires me to do FPGA implementation of generating 15-harmonics cosine wave with different phase shifts. Can anyone help me with the VHDL/Verilog coding? My project is related to crest factor reduction.

I'm using Altera DE1 board.

Please help. Many thanks.

 

[kirill]

Hi
For example Xilinx offer ip cores to produce sine or cosine, Altera perharps has similar cores. In user guides of these cores Xilinx, Altera shows common approuch to construct cosine generator. May be you should start form these docs.

 

[TrickyDicky]

What problems are you having?

 

[highstreets]

There's a megafunction in Quartus II called NCO that can help to generate VHDL coding for sine wave but what I want to implement into the FPGA board is generating the end waveform of a sum of cosine waves of different harmonics. I have done it in MATLAB, so now I want to do on my DE1 board.

 

[lucbra]

Can't you try to implement by using IFFT?

 

[Black Jack]

You mean 15 harm of one frequency shifted?
If yes then you can use
1) DDS-techniques, DFF`s delay taps for produce
phase shift and adders tree for final calculation.

2) Table approach - counter and memory. Memory hold pre-calculated output waveform values

 

[highstreets]

Guys, I managed to solve the problem by using sine wave block under signal processing blockset in Simulink. Simulink HDL Coder will help to generate the VHDL coding based on the Simulink model.

Thanks for the help.