jgorsk
Member level 3
gclk xilinx
I try to design a crcuit with Spartan 2E. I use ISE 4.2 and ISE 5.1.
There are few clock input pins in the design. I don't want them to be
GlobalClock pins (GCLK) but placer forces using GCLK instead of general
purpose IO pins.
When I try to assign cloks to non GCLK pins, placer reports errors.
Is there a way to avoid placer of automatically assigning clock
signals to GCLK pins?
I try to design a crcuit with Spartan 2E. I use ISE 4.2 and ISE 5.1.
There are few clock input pins in the design. I don't want them to be
GlobalClock pins (GCLK) but placer forces using GCLK instead of general
purpose IO pins.
When I try to assign cloks to non GCLK pins, placer reports errors.
Is there a way to avoid placer of automatically assigning clock
signals to GCLK pins?