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Gate drive transformer V.us spec is for saturation or core loss?

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cupoftea

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Hi,
We have a Full Bridge SMPS to fix
Vin = 220V, vout = 28V, fsw=250kHz (125kHz each FET) , 500W

The FETs are driven by gate drive transformer
B82804A0264A210

These have a V.us spec of 22.4
This appears to be why they picked a 250kHz (125kHz each FET) switching frequency.

Is the V.us spec saturation related or core loss related?

(oviously, AYK, if sat rated, then we can never go over it, whereas if core loss related, then we can violate it for short periods.)

Its datasheet doesnt say.
 

p.s. - if a fet switches at 125kHz, then that is the sw freq of the converter - not 250kHz, as there is no driving part that does this.
--- Updated ---

22.4 VuS 125kHz is 4uS each way on the GD Tx, 22.4 / 4uS = 5.6V max gate drive -> won't work .... unless you got logic level fets - ...!?!?!?!?

--- Updated ---


this conflict has already been posted earlier regarding this design
 
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22.4 VuS 125kHz is 4uS each way on the GD Tx, 22.4 / 4uS = 5.6V max gate drive -> won't work .... unless you got logic level fets - ...!?!?!?!?
Thanks, the ON time of each FET is only 2.04us due to the 4:1 transformer. As such, the V.us is 22.04.
So we should be OK.?.....but i dont see how we calculate the dB, since the GDT datasheet doesnt give the core area.?

Of course the spec is for saturation flux. Losses are also frequency dependent.
If its a saturation rating, then that suggests we are doing dB = +/-0.3T which woudl surely overheat on core loss?
 

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this conflict has already been posted earlier regarding this design
Thanks, yes, we now changed it from...

275vin 250khz, 28vout, 500w
to

220vin 250khz 28vout 500w

...and are looking to reduce fsw to ,150KHZ (75KHZ each fet)...but cant because of the GDT....as you know, this brings in new considerations.
 

If you run the GD Tx at is full V.uS rating - the cores will likely warm up a bit

you say 2uS on time for the fet - but is that at min Vin ?
--- Updated ---


p.s. 150kHz and 75KHz per fet is quite some way away from how a power electronics engineer would describe a converter, if a fet switches at 75kHz, then it is a 75kHz converter - there is no 150kHz on the driving side ... further the Tx ( any Tx ) will see only a 75kHz periodic waveform - not 150kHz.
 
you say 2uS on time for the fet - but is that at min Vin ?
Thanks, no thats at Nom Vin.....You are right, we need to design in for min vin...but not with this board.....cust has sent it in and just wants to see the thing working....at nom vin.......we wont give it min vin.....its a long, long story...but this board is strewn with errors, and the cust just wants to see if the board can actually work at all. Please dont ask me why, ive no idea.....i offered to re-layout the board and start afresh, but they are not interested.

p.s. 150kHz and 75KHz per fet is quite some way away from how a power electronics engineer would describe a converter,
Thanks...I design a Full Bridge initially as a Buck, with an "effective vin".....of Vout/D volts.....i then get the np/ns by "actual vin"/"effective vin" = Np/Ns....and then go from there........so i have to start with the twice actual frequency.....since as you know, a Buck only has the one fet.
--- Updated ---

Also, AYK, when you do a full bridge with eg a UC2825, you need to program the RT,CT for 250kHz if you want 125kHz actual operation.....so sometimes just kind of call it 250khz, for the sake of it, even though it isnt really.
 
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Also, AYK, when you do a full bridge with eg a UC2825, you need to program the RT,CT for 250kHz if you want 125kHz actual operation.....so sometimes just kind of call it 250khz, for the sake of it, even though it isnt really.
250 kHz is switcher IC oscillator frequency, not SMPS fsw as claimed above.
 
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