Gain of multiplier FET at target frequency, can it be <1 for target frequency?

[Terminator3]

For example, we double some frequency. At F0 gain is >3, and at 2*F0 it is <1. I thought that high gain at F0 is enough, because we get clamped wave at F0, wich contains 2F0 harmonics. But from simulations, i see, that performance not as good as i expected. Even no gain!!! after doubling. If use the same device at lower frequency and n*F0 is looks pretty well.

 

[chuckey]

Are you suggesting that you expect the gain of a FET to be the same when used as an amplifier or as a multiplier? In the old days we used to have to generate 50W+ at VHF frequencies to get 1 W at UHF with a load of multipliers, its the way of the world.
Frank

 

[Terminator3]

I can't understand why harominc is attenuated more, than at lower frequency. Is it some kind of loss inside FET? Maybe it's parasitics works as block for harmonic RF? When i double relatively low frequency, it's output is high, almost 0dBm. Gain at F0 is about 3, and at 2*F0 is around 1. When i double higher frequency, the output is -40..-50dBm, gain at F0 is still 3, and i use similar design procedures. Gain is lower than 1 for target frequency, so i thought maybe it is related somehow.