sudeep_
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Fully differential current steering DAC output voltage range?
Hello all,
How to get full scale output signal range from fully differntail current steering DAC NMOS architecture.
For example, 1V peak to peak output signal is needed from 1.2 V (Vdd) power supply at the load.
Present it giving the output at both sides, Vout max = Vdd and Vout min = Vdd-I_fs*Rl.
I need the output signal range from 0 to 1 V. Do i need any additional circuit at the output stage of CSDAC like differential Amp, or buffers.
Thank you,
Hello all,
How to get full scale output signal range from fully differntail current steering DAC NMOS architecture.
For example, 1V peak to peak output signal is needed from 1.2 V (Vdd) power supply at the load.
Present it giving the output at both sides, Vout max = Vdd and Vout min = Vdd-I_fs*Rl.
I need the output signal range from 0 to 1 V. Do i need any additional circuit at the output stage of CSDAC like differential Amp, or buffers.
Thank you,
