abraren
Newbie level 4
I want to make a frequency multiplier (60 Hz input frequency, output frequency of 120 Hz) using an FPGA (Spartan 3E).
Can anyone help me with an example of whether or not you can do this. I already check that can be done with a DPLL but it is very difficult to implement.
Can anyone help me with an example of whether or not you can do this. I already check that can be done with a DPLL but it is very difficult to implement.