FPGA memory access from a softcore processor

[Binome]

Hi,
I'm using an Altera Cyclone IV FPGA. My hardware design is using the FPGA memory to store information. I'm also implementing a NIOS processor on this very FPGA and I want this processor to read the memory. What should I do?
Thank you.

 

[ads-ee]

You build the system in Qsys or EDS depending on the version of tools you are using. Just add the Nios II and the memory that you want attached. You should go through the tutorials/training. http://www.altera.com/education/training/curriculum/soc/trn-soc.html

Here is a user guide for the embedded design suite.
http://www.altera.com/literature/ug/ug_soc_eds.pdf


Regards

 

[FvM]

Implement a dual-port memory with Avalon MM slave interface on the NIOS side.

 

[Binome]

What is Avalon MM?

 

[FvM]

Review NIOS documentation.

 

[ads-ee]

What is Avalon MM?

This: https://www.altera.com/literature/manual/mnl_avalon_spec.pdf