FPGA and ADC intefacing

[vikrant.eda]

adc 8 bit parallel to fpga

Want to know about FPGA and ADC interfacing?
Is this interfacing differs with the FPGA vendor or any standard interfacing is there???
Thanx in advance.

 

[kishore2k4]

Depending on the ADC you choose, its either a parallel interface or LVDS links. Most ADCs use a standard parallel interface with a few control pins for conversion and indication stuff. Just check the datasheet of any ADC and you'll get an idea.

 

[manasiw2]

hi
you can choose from various ADCs oprating on different protocols.if you are using say SPI protocol ADC you'll hv to write spi driver in FPGA.
if u've chosen any ADC then its datasheet will provide the details.

 

[sita]

Hi,

I'm a beginner in FPGA. I too have an interfacing section with ADC. I'm using 8 bit parallel ADC and it's output can be made compatible with FPGA Input. (ie,3.3V for HIGH and 0 for LOW). I plan to include input section( final block of input section is ADC) on a PCB board. And will be there be any noise related issues when I interface ADC output to FPGA input? I'm at designing stage now. I haven't implemented this. So want to rectify if there's any mistakes.

If you know this, can you please help me?

Regards,
sita

 

[rajsrikanth]

it depends on your ADC you selected. because usally some pins of ADC may have differential and some may be single ended. and also if u have to give a clock to ADC from FPGA then also the pins should be selected

 

[muralicrl]

Hi,

You have to see the ADC output specifications and FPGA input specifications. The specifications means, CMOS or TTL or LVDS, serial or parallel, ADC sampling rate and FPGA maximum input rate, etc..

If you need more information, contact me,

Regards,

N. Muralidhara

CRL-BEL

 

[xtcx]

You may need to add suitable Op-amps for adjusting the gain or if to use the differential input of the adc\dac. Maybe you need some experts advice for designing or take a look at the reference circuit for the adc\dac in TI or AD!.that should help...