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formality : why the need for rtl vs netlist verification

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zeese

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Hi all..

Currently I'm doing verification for rtl versus netlist.
The netlist haven't been modified. It comes right after
being sythesized by Synopsys Design Compiler.


The main question in my mind is, why I need to verify the netlist. Is it
means that the tools cannot be trusted? In other words, there's a possibility
that the tools is making an error in generating a netlist, isn't it?

Tq.
 

It's is meant to determine if your netlist is functionality equivalent to your RTL. Non-equivalencies may come from tool issues, script issues and bad RTL coding.
I highly recommend running LEC at all stages of your design:
RTL vs synthesized netlist
RTL vs DFT netlist
RTL vs postlayout netlist
I even run prelayout netlist vs postlayout netlist, although it is probably not required.
 

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