gump38
Newbie level 3
For the design a 10 bit sar adc , what should be the maximum offset of the comparator
Hi Guys,
Iam going to design a 10 bit cmos adc, using SAR architecture, with capacitif dac, my question is : what should be the maximum offset of the comparator, less than half lsb ?
Thanks in advance
Gump
Hi Guys,
Iam going to design a 10 bit cmos adc, using SAR architecture, with capacitif dac, my question is : what should be the maximum offset of the comparator, less than half lsb ?
Thanks in advance
Gump