I need folded cascode design step by step, i want to implement it on cadence 180nm
suggest me the procedure or ieee paper through which I can design Folded cascode opamp using cadence
You can find a lot of folded cascode opamps here on EDAboard, and many tutorials in the net. How to size such an opamp and implement it with Cādence tools you have to learn and find out yourself. Anyway its transistor sizing depends on several requirements like supply voltage limits, gain, power consumption versus bandwidth, noise, drive capability ...