"Foldback" implies that the current limit will be further
reduced if the output is driven higher against the limited
current. This is more of a "power limit". You may not
want to get into the multiplication that a true power
limit scheme would entail, adding in an output voltage
term by summing could be "good enough".
If this is discretes based, can you accept adding an
emitter sense resistor (~0.7V to turn on a base shunt
NPN)?
If integrated such that you can depend on matching
and one more transistor costs roughly nothing, you
could go to schemes that impose a lower voltage "tax"
(like using an emitter coupled amplifier to sense a
lesser emitter resistor's voltage, maybe 100mV or so)
and find a place where summing in VOUT/Rxxx
current gives you the output-reduces-further-with-
IOUT profile.
If you find old timey linear regulators which advertise
foldback limiting specifically, their datasheet / app note
schematics might offer details of specific implementations.