There is no easy automated way. The moment you mention ECO, you are basically trying to manually insert something that the tool doesn't like. Now I don't know what is the "right"-way (tm) of doing it, but here is what I did before:
1. First off, if you want to do a metal-mask only change then synthesis stage is pretty much useless. You can only make this change w/ your layout tool.
2. Second, make damn sure that your new "fixed" logic is working (run all the Functional Verification with the changed RTL)
3. I hoped you have kept some spare cells (or GACC) cells lying around. Now what you need to do is go into the netlist file and manually try to make the corresponding RTL change in gates. (Note: you can do this in DC with tcl commands, but I find it easier to just modify the gates file directly)
4. Now you take the modified netlist and you run that through your functional verification test suite (using structural sims). This is to make sure that fixed it correctly.
5. Then, as sign-off run formal verification to verify that the new modified RTL matches the new modified (hand-modified) netlist.
6. Alright, now go into your PnR tool (I am only familiar w/ astro/ICC), open the last design (the design you want to apply the ECO to). Start after the point of Place and CTS, but before Route. Set up the freeze silicon ECO flow (check your manual). Remove the don't touch on your spare cells (set it as soft-fixed). Now insert the new (modified) netlist using the ECO netlist command (eco_netlist in ICC). You will also have to map some spare cells into the new cells. If the change is minor, you can manually change the route by hand (make sure you run DRC). If it is major run the ECO route command (route_zrt_eco / route_eco in ICC).
7. Take it through the rest of the DFM flow.
Well, good luck following that direction I just dashed out of my head w/o looking at the manual.
narfnarf