The pins are DQ pins, they are both inputs and outputs depending on if you are writing or reading respectively. So you can't just drive a 0 out of the FPGA constantly.
If you never plan on using those pins (ever) then you could ground them through some 10K resistors, so they aren't floating. But if there is ever a chance the 8-bits might get used in the future (enhancement, new requirement, etc), then I would probably make my DDR3 core 32-bits and ground the user write interface going out and not connect the read interface to those bits. Then if you ever need to add them back in the logic will be available to use, also the tools will strip out the user interface logic but leave the I/O drivers as it will still control the read/write input/output control.