Flash adc simulation

[GauthamG]

Hi all,
I have designed a 7 bit flash adc.
Its sampling frequency is 500MHz. I was able to obtain an ENOB of 6.2 from the simulation.
But I cant simulate the same adc for high frequency.(probably 150-250MHZ).
Can any one tell me to do that or why I am not able to produce the result??
Where will be the problem????

 

[BradtheRad]

Are you able to set the time step?
It should be short enough so that, maybe 50 to 100 of them will fit within your operating cycle.

Example, to handle 250 MHz, try a time step of 80 pico-Seconds.

 

[GauthamG]

Are you able to set the time step?
It should be short enough so that, maybe 50 to 100 of them will fit within your operating cycle.

Example, to handle 250 MHz, try a time step of 80 pico-Seconds.

Time step???
What does it indicates?//
Can you tell me....

 

[BradtheRad]

I'm suggesting this because the timestep is one of those important (but not-so-obvious) things about using an electronics simulator. (I know because I needed to have it pointed out to me.)

The simulator regards the circuit as acting from one increment of time to the next. This is the timestep.

The simulator re-calculates the circuit each time, based on its latest parameters from the previous timestep.

What if the timestep is too large? Then the simulator will fail to take into account any actions which take place in a shorter time period.

That is why we must be aware of the timestep. It may help if you try different values, to get a simulation that 'makes sense'.