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fixing Timing violation

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mj08

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Hi,
i am very new to PD and i am working on this block which seems to have a very tight setup/hold margin. i see that the setup violating path has a lot of hold fix cells put in and if i try to reduce the dly or remove the delay cells, it breaks the hold . if i even try vt swapping or upsizing, the hold breaks. there is no noise in the path. i am not sure how i can fix these violations ? could some one please suggest something
 

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