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finding the value of CTH

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mohamis288

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Hi,
I want to do thermal simulation on LDMOS power amplifier. CTH is an important factor in normal condition? I must consider that through thermal simulation or I skip it? its value is not available in datasheet ( even in similar LDMOS power amplifier). so what value for this is rational?
 

Solution
This is going to encompass duty cycle / pulsed heating
as thermal time constant and "heat waveform" will
determine an effective volume / mass. It's messy, is
what I came away with last time I tried.

LDMOS has good thermals when "on" because current
and remaining resistance are diffuse. In "saturation"
the heat is all dropped in the much smaller drift region
volume, must then be transported to and past drawn
device extents. Carrier transport across reverse vs
forward biased junctions, vs uniform field free regions
and all that kind of fun.
This is going to encompass duty cycle / pulsed heating
as thermal time constant and "heat waveform" will
determine an effective volume / mass. It's messy, is
what I came away with last time I tried.

LDMOS has good thermals when "on" because current
and remaining resistance are diffuse. In "saturation"
the heat is all dropped in the much smaller drift region
volume, must then be transported to and past drawn
device extents. Carrier transport across reverse vs
forward biased junctions, vs uniform field free regions
and all that kind of fun.
 

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  • silicon_heat_capacity_ECTP2005paper139.pdf
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  • 2014-Stout-Linear-Superposition-EC-Webinar_handout.pdf
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Solution
Consider the thermal stack of the product, to think about
the transient thermal behavior.

You have the core device, inside a die, inside a package,
on a board.

Each "assembly" has a different ultimate heat capacity
(your CTH). The die is simplest; call it all silicon, volume
X*Y*Z, specific heat, there's your gross CTH. You may
also find a thermal time constant formula for this
prismatic material shape, using the dimensions and
constant.

Device inside the die, is a fraction of the volume and
the X-Y extents (see remark about heat concentration
in the drift region, and look at a layout). Thermal time
constant and CTH will be lower (if CTH is framed by
"what is my maximum die temp reached?" against a
time varying load).

Package adds heavy metal heat slug and a better
"DC" thermal path. The time for device to reach
steady state temp has increased, the rate of heat removal
also increases but so does the time for heat to get from
drift region to package baseplate. I'd treat this as a two
part problem as materials are now heterogeneous in
type and size.

It would be comforting if your calculations returned
numbers of the same order, as the steady state and
pulsed power ratings (but then they must also
comprehend the vendor's test setup, heatsink,
airflow, etc. which has now gone beyond any hand
calcs, becoming province of multiphysics or thermal
simulators.
 

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