FDTD in VHDL targetting cheap FPGAs ??

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svarun

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fdtd vhdl examples

Has anyone implemented FDTD algorigthm in VHDL ? Downloading the code to an FPGA and executing the algorithm in hardware should significantly speed up the execution times for large problems. Probably usage of dozens of (cheap) FPGAs for parallelizing the code should give us significant gains. Let me know

-svarun
 

Interesting idea. How about the memory requirement?

I've read that SEMCAD has "hardware acceleration" through the processor in video card.
 

**broken link removed**

The graphic card GPU is a vector processor with a number of MAC units so it can be used to help the main CPU for computation. Modern GPUs allow user access it using APIs. So, we can use it.
 

I think you would have to talk to Speag about the cost as they market the Acceleware hardware as an add on accelerator to SEMCAD.

As far as an FPGA would cost I'm not exactly sure.
 

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