False Paths and Multi Cycle Paths

[cganeshprabhu]

Can someone explain me what are false paths and multi cycle paths .. ?

Thanks

 

[Johnson]

False Path is do not care in timing analysis and multi-cycle means path needs more than one clock cycle to process incoming data!

 

[roger]

Can someone explain me what are false paths and multi cycle paths .. ?

Thanks

false path: Normal signals flow never pass through .
multicycle path: timing path that costs several clk cycles .

 

[Kulprashant]

hi,
false paths not related to clocks and no need to consider these paths.while multi cycle paths will take two or more clock cycles.

with regards,
kul

 

[wkong_zhu]

false paths is the path that you don't care timing. for example, when IC finished reset, the chip go to some mode, and the mode signal will not change during working session. then, the mode signal to all other signal paths is false path.
multicycle path is the paths that the timing can be more than just one clock period. for example, there is some signals that will change every 2 clock cycles. then the paths between this signals may be multicycle paths with 2 cycles.

 

[sandysuhy]

Hello everyone,

Multicycle paths :Usually false and multicycle paths comes in STA. An STA analyzer analyzes any path in one clock cycle. If suppose the path takes more than one cycle then we must specify the tool that how many extra cycles we must provide to analyze that path.

False Paths : There may be some paths in your design where the data does not traverse. But STA analyzer will not be knowing and hence it may be analyzing that path. Hence we make that path as false path so that STA should not analyze it.

 

[amarnath]

thr STA is a tool which will try to analyze the paths in your digital circuit and then find out from there which is your longest path.false paths are those which can never be encountered.but the STA tool has now way to find out a false path.

regards
amarnath

 

[power-twq]

The false is those path that the timing is don't care.

for example: the path between totally asynchronous clocks.

you can set these path for false path in DC.

mtlicycle path is those path that is spend more than one clock cycle to

complete a function.

Can someone explain me what are false paths and multi cycle paths .. ?

Thanks