1) complete DEF (logic with connection)
2) You dont use just .tf (is has only cell delays) as this is routed design you use technology file to get real data values of metal and vias aloang with fanout and actual routing delay.
3) RC corners with PVT conditions.
4)Input from STA (timing input)
These are the basic inputs, Not sure if you need anything else for advance analysis.
hi cyrax747,
1/ DEF file
2/ I think you will need cell/macro information (from LEF) for linking your design.
3/ RC corner
that's what I am using to extract.
You need:
the top def file from PnR your_design.def.
the NXTGRD file (.nxtgrd), techno information (based on itf)
the def to nxtgrd map file, to map the layer name between these two formats
the .lef of each macro/ips used in your_design.def (std cell, memory, pad, ...)
and that's it.
I recommend to used .sbpf which smaller than .spef (b for binary)