ESD CDM protection principle

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junsik

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Hi, I wonder how ESD protection circuits work in CDM stress.
CDM stress has two different polarities.
When negative CDM stress that is the substrate is charged negatively, the CDM current come in from the external ground. it is similar with general ESD like HBM. I can understand the principle of GGNMOS, SCR and Diode in this case.

However, when the substrate is charged positively, the CDM waveform flows from inner circuit (substrate) to external ground and cause damage on gate oxide. I can't understand how the positive CDM stress can be handled using ESD protection devices. pn junction of diode is used?
What is the general CDM protection devices and circuit???

Thank you.
 


(GGN)MOSFETs (and also SCRs, probably) have manufacture-caused anti-parallel diodes, which limit to their forward voltage.
 

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