Errors and warnings when compiling unisim and simprim in Xilinx

[lmtg]

Is it normal for xilinx to give errors and warnings when compiling unisim and simprim??

 

[thiagu_comp]

difference unisim simprims

No. What errors are you getting.
From the command prompt try running the command "compxlib" to compile these libraries with required options.

eg:
compxlib -s mti_se -arch spartan3e -l verilog -lib unisim -p c:\Modeltech\Win32 -dir d:\project\compiled_libraries

-s --> simulator
-arch --> which FPGA architecture
-l --> which language
-lib --> which library needs to be compiled
-p --> simulators path
-dir --> location to store the compiled library output

Refer "Development system reference guide" from xilinx. It is available in "Software manuals" (can opened from Windows program menu also).

 

[lmtg]

is not in the sensitivity list

Here's a sample of the errors and warnings i get when compiling through the "compile hdl simulation libraries" option..
* Error: C:\Xilinx92i\vhdl\src\simprims\simprim_VITAL_mti.vhd(22819): Internal error: EXPR, val = 495, ../../../src/vcom/checkvital.c(2054)
** Error: C:\Xilinx92i\vhdl\src\simprims\simprim_VITAL_mti.vhd(22819): Internal error: EXPR, val = 495, ../../../src/vcom/checkvital.c(2054)


** Warning: C:\Xilinx92i\vhdl\src\unisims\unisim_VITAL.vhd(44949): Synthesis Warning: Signal 'a3' is read by the process but is NOT in the sensitivity list.
** Warning: C:\Xilinx92i\vhdl\src\unisims\unisim_VITAL.vhd(44949): Synthesis Warning: Signal 'a2' is read by the process but is NOT in the sensitivity list.

 

[thiagu_comp]

compiled hdl libraries

Check if all VITAL packages are being loaded properly (from the log file).
It shall be available in your simulators installation directory (VITAL2000, VITAL2.2b).

I tried using "compile HDL libraries" in GUI also. I am not facing any issues.

Right click on "compile HDL Libraries", goto properties and try setting the simulator path.

 

[shastri.vs]

command for simprim compilation

I was also getting errors while compiling simprim libraries for modelsim.
I installed modelsim 6.4.
In ISE I coose simulator as Modelsim. Then in ISE befire running post route simulation I compiled simprim libraries.
It worked fine after that. But you need to repeat these steps for every project.

 

[thiagu_comp]

compxlib errors

@Shastri,
It would not be the problem with tool version. I am using Modelsim 6.1. Still there are no problems. I prefer command line usage because we have to provide every information for the tool using switches. In GUI the tool assumes a few things which might be wrong.

 

[lmtg]

unisim simprim modelsim 6.4

i'm using modelsim se 6.3a..

Added after 20 minutes:

Here's what i got on compiling.. Any ideas..

compxlib -s mti_se -arch virtex4 -l vhdl -lib simprim -w -p C:/FPGAdv81PS/Modeltech/win32 -dir c:/xilinx92i/vhdl/mti_se
Release 9.2.04i - COMPXLIB J.40
Copyright (c) 1995-2007 Xilinx, Inc. All rights reserved.

XILINX = 'C:\Xilinx92i'
Library Source => 'C:\Xilinx92i'

Compilation Mode = FAST
Scheduling library compilation for VIRTEX-4
Compiling Xilinx HDL Libraries for ModelSim SE Simulator
Language => vhdl
Backing up setup files if any...
Output directory => 'c:\xilinx92i\vhdl\mti_se'

--> Compiling vhdl simprim library
> Simprim compiled to c:\xilinx92i\vhdl\mti_se\simprim
> Log file c:\xilinx92i\vhdl\mti_se\simprim\cxl_simprim.log generated
> Library mapping successful, setup file(s) modelsim.ini updated

compxlib[simprim]: 8 error(s), 1047 warning(s)

Log file (compxlib.log) generated.

child process exited abnormally
%

 

[thiagu_comp]

compile simprim for modelsim

This seems to be some environment issue - problem in library source files, xilinx or modelsim environment.

Can you attach the log file.

Try compiling unisims and xilinxcorelib also. we can narrow down the issue if there are no issues in them.
This is not a common issue. So, I dont have a straight answer.

 

[lmtg]

unisimand simprim?

what is a log file??