ERROR while loading design in modelsim 5.6

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sajeev_antony

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+check the transcript file +modelsim

Hi,
I get the following erre while loading a design into the simulator.
can anyone help me.
iam using modelsim 5.6

vsim work.tb_updncnt
# vsim work.tb_updncnt
# Loading D:/Modeltech_5.6e/win32/../std.standard
# Loading D:/Modeltech_5.6e/win32/../ieee.std_logic_1164(body)
# Loading D:/Modeltech_5.6e/win32/../ieee.std_logic_arith(body)
# Loading D:/Modeltech_5.6e/win32/../ieee.std_logic_unsigned(body)
# Loading work.tb_updncnt(tb_behav)
# Loading work.updncnt(behav)
# ** Fatal: (SIGSEGV) Bad pointer access.
# Time: 0 ns Iteration: 0 Region: /tb_updncnt/uut File: F:/Sajeev/UpDnCnt/updncnt.vhd
# FATAL ERROR while loading design
# Error loading design
 

modelsim 5.6 fatal license error

The most possible problem is that you probably didn't pass the compiling process, I met the problem many times, you must check in the following way.

1. select compile-> compile summary to check if any error or warning
2. check the transcript file to see if any error while loading

if you had checked them but couldn't found the error or warning . It
may be the license problem.
 

Looks like uncompiled libraries to me ...
 

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