micro designer
Junior Member level 2
hi ,
I have used the verilog-A model of opamp in cadence ahdl library as shown in the file View attachment code.txt. It models the dominant pole of the opamp and slewing limitation.
following values were taken for the opamp parameters :
open loop gain = 1000, unity gain frequency = 50 MHz shown here the schematic
I have done AC analysis by providing sinusoidal signal with ac mag=0.2 to the inverting terminal of opamp. ac plots are here
thanks
I have used the verilog-A model of opamp in cadence ahdl library as shown in the file View attachment code.txt. It models the dominant pole of the opamp and slewing limitation.
following values were taken for the opamp parameters :
open loop gain = 1000, unity gain frequency = 50 MHz shown here the schematic
I have done AC analysis by providing sinusoidal signal with ac mag=0.2 to the inverting terminal of opamp. ac plots are here
thanks