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Perhaps you are referring to the duty-cycle clamp?
Essentially, limit the duty-cycle, such that no matter what the error amp output does, the maximum duty-cycle is never exceeded.
See the datasheet of the PWM chip for the correct method to clamp the duty-cycle.
If I have a voltage(vref) in postive input of error pamp and a feedback voltage(vfb) from the dc converter output to the negative input of err opamp. The dc converter optput initial is zero.When in closed-loop simulation what is the right error opamp output will to be??
The output voltage of the error amp should be initialized to that voltage that produces the correct duty-cycle for the desired output voltage and current, at the given input voltage.
For example, if for a 5V / 1A output and an input voltage of 12V you need a duty-cycle of 0.475 and you know that to obtain that you need 3.451V from the error amp output, then you initialize it to 3.451V.
I still have two questions
(1) The error opamp DC gain is 1000 and the error opamp output is 1000*(vip-vin)
if the converter output initial is zero, then the error opamp output is saturation
to VDD.Only when the error opamp positive and negative input are very close
and the error opamp output are not saturated to VDD.That is need to clamp the
error opamp output to the desired voltage.Right??
(2) If the DC converter input range is 1.8~3.6 ,output is 3.0. How to set the desired
output voltage of error opamp. Because it has buck and boost opreration.
1. The output voltage should also be initialized to the steady-state value, in order to avoid the saturation of the error amp.
The error amp output is clamped to such a value that will produce the maximum allowable duty-cycle. This maximum is based on other considerations: driver type, converter type (a buck can take 100%, but not a forward), etc.
2. You should run the simulation for one input voltage at a time. You then calculate the required duty-cycle for that particular voltage and initialize the error amp output to the value that will produce that duty-cycle.