Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

ENC28J60 Pattern Match filter

Status
Not open for further replies.

deniah

Member level 4
Joined
Nov 28, 2005
Messages
74
Helped
6
Reputation
12
Reaction score
5
Trophy points
1,288
Location
Montenegro
Activity points
1,777
Hello

I need help with enabling Pattern Match filter on ENC28J60.
I use little modified example from ENC datasheet. ENC is supposed to respond
when encounter {0x09, 0x0A, 0x0B, 0x0C, 0x0D} at the beginning of data field
of incoming packet.
Here is my code:

Code:
#define Spi_Ethernet_HALFDUPLEX     0x00
#define Spi_Ethernet_FULLDUPLEX     0x01

#define EPMOH    0x15  // Bank1
#define EPMOL    0x14  // Bank1
#define EPMM7    0x0F  // Bank1
#define EPMM6    0x0E  // Bank1
#define EPMM5    0x0D  // Bank1
#define EPMM4    0x0C  // Bank1
#define EPMM3    0x0B  // Bank1
#define EPMM2    0x0A  // Bank1
#define EPMM1    0x09  // Bank1
#define EPMM0    0x08  // Bank1
#define EPMCSH   0x11  // Bank1
#define EPMCSL   0x10  // Bank1
#define ERXFCON  0x18  // Bank1
#define EIE      0x1B  // Any bank
#define EIR      0x1C  // Any bank
#define ECON1    0x1F  // Any bank

// required by library
sfr sbit SPI_Ethernet_Rst at RC1_bit;
sfr sbit SPI_Ethernet_CS  at RC2_bit;
sfr sbit SPI_Ethernet_Rst_Direction at TRISC1_bit;
sfr sbit SPI_Ethernet_CS_Direction  at TRISC2_bit;

typedef struct {
  unsigned canCloseTCP: 1; 
  unsigned isBroadcast: 1; 
} TEthPktFlags;

unsigned char   myMacAddr[6] = {0x00, 0x14, 0xA5, 0x76, 0x19, 0x3f} ;   // my MAC address
unsigned char   myIpAddr[4]  = {192, 168, 20, 60} ;                     // my IP address

unsigned int SPI_Ethernet_UserTCP(unsigned char *remoteHost, unsigned int remotePort, unsigned int localPort, unsigned int reqLength, TEthPktFlags *flags) {
  return 0;                                     
}

unsigned int SPI_Ethernet_UserUDP(unsigned char *remoteHost, unsigned int remotePort, unsigned int destPort, unsigned int reqLength, TEthPktFlags *flags) {

  unsigned int len;                             
 
  if (destPort != 10001) return 0;                                   
 
  len = 3;
 
  SPI_Ethernet_putByte('O');
  SPI_Ethernet_putByte('k');
  SPI_Ethernet_putByte(0);
 
  return(len);                                 
}

/* EPMOH:EPMOL = 0x0006              ->  offset
   EPMCSH:EPMCSL = 0xDEE9         ->   checksum
   EPMM7:EPMM0 = 0x0000000000001F00 ->  mask bits */
   
void set_rx_filter() {
   char tmp, tmp2;
   
   tmp = SPI_Ethernet_readReg(ECON1);              //
   
   SPI_Ethernet_writeReg(ECON1, (tmp & 0b11111100));  // clear banksel bits
   SPI_Ethernet_writeReg(ECON1, (tmp | 1));           // goto bank1
   
   SPI_Ethernet_writeReg(EPMOH, 0x00);
   SPI_Ethernet_writeReg(EPMOL, 0x06);

   SPI_Ethernet_writeReg(EPMCSH, 0xDE);
   SPI_Ethernet_writeReg(EPMCSL, 0xE9);

   SPI_Ethernet_writeReg(EPMM7, 0x00);
   SPI_Ethernet_writeReg(EPMM6, 0x00);
   SPI_Ethernet_writeReg(EPMM5, 0x00);
   SPI_Ethernet_writeReg(EPMM4, 0x00);
   SPI_Ethernet_writeReg(EPMM3, 0x00);
   SPI_Ethernet_writeReg(EPMM2, 0x00);
   SPI_Ethernet_writeReg(EPMM1, 0x1F);
   SPI_Ethernet_writeReg(EPMM0, 0x00);

   tmp2 = SPI_Ethernet_readReg(ERXFCON);
   
   tmp2 |= 0b00010000;
   SPI_Ethernet_writeReg(ERXFCON, tmp2);  // enable pattern match filter

   SPI_Ethernet_writeReg(ECON1, tmp);
}

void main() {
   TRISA = 0; TRISB = 0; TRISD = 0xC0; TRISE = 0; TRISC = 0;
   LATA = 0; LATB = 0; LATC = 0; LATD = 0; LATE = 0;

   CM1CON0 = 0;
   CM2CON0 = 0;

   ANSELA = 0;
   ANSELB = 0;         
   ANSELC = 0;
   ANSELD = 0;
   ANSELE = 0;   

   SPI1_Init();
   SPI_Ethernet_Init(myMacAddr, myIpAddr, Spi_Ethernet_FULLDUPLEX);
   
   set_rx_filter();
   
   while (1) {
      SPI_Ethernet_doPacket();
   }
}


With this code ENC allways return "OK", no matter what is sent.
MCU is 18F46K22, at 32MHz (8MHz on board with 4xPLL enabled).
Compiler is MikroC Pro 6.62

Thanks
Refik
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top