emergancy need on tripple well model of 0.18 um technology

[amny]

Hi every one
I really need the transistor model of an NMOS in 0.18 um triple well technology for simulation of circuits in hspice. It is due to my M. S. project and I have little time up to my defence session. I have some simulation results in 0.18 um TSMC mixed mode technology, but they are with typical NMOS of this technology. The guidelines to change the transistor models of a typical NMOS to triple well type can help me too.
Thank you for your help.

 

[crutschow]

There is no standard model for a triple well process. You need to get that info from the fabrication plant.

 

[erikl]

The guidelines to change the transistor models of a typical NMOS to triple well type can help me too.

I'd think it's enough to change the channel doping concentration NCH to the doping concentration of the p-well (≈ 3.2e+017).

 

[amny]

I'd think it's enough to change the channel doping concentration NCH to the doping concentration of the p-well (≈ 3.2e+017).

tanks for your answer. but can you introduce me a reference on it. I should defend my assertion in my defence session.

- - - Updated - - -

I'd think it's enough to change the channel doping concentration NCH to the doping concentration of the p-well (≈ 3.2e+017).

tanks for your answer. but can you introduce me a reference on it. I should defend my assertion in my defence session.

 

[erikl]

... can you introduce me a reference on it.

Unfortunately not. But I think changing NCH is enough, because there are no other physical differences. At least I didn't find any other differences in our model files (from a few years ago), not even in VTH.

SPICE/SPECTRE should calculate the different channel conductance and the corresponding capacitances correctly with the new NCH value. You could try and compare their values.

 

[amny]

thanks again erikl. Can you tell me about the range of typical NMOS's NCH in 0.18 um technology? The NCH of NMOS transistor in my technology file is 3.9E+17. Is this difference in NCH value of triple well an typical NMOS (3.2E+17 and 3.9E+17), regular?

 

[erikl]

Is this difference in NCH value of triple well an typical NMOS (3.2E+17 and 3.9E+17), regular?

No, I don't think so. Our process used an EPI p-stubstrate with NCH=5.22E+16 . The triple well p implant concentration usually is higher.

For non-EPI processes s. e.g. these SPICE data from TSMC/MOSIS.

 

[amny]

For non-EPI processes s. e.g. these SPICE data from TSMC/MOSIS.

but in the mosis test data EPI and non-EPI processes have the same NCH!

 

[erikl]

... in the mosis test data EPI and non-EPI processes have the same NCH!

To achieve the same doping concentration for EPI and non-EPI substrates means the wafer provider can adjust his processes quite well.

Or the extractor (or MOSIS) guys just took over the values ...

So what? Don't mind -- or ask the MOSIS guys!