Effect of Drain-source voltage on NMOS operation

[Vaibhav Sundriyal]

I have been trying to understand the NMOS operation through various online tutorials but I am getting stuck in understanding the effect of increasing drain voltage on the flow of current and the channel length. I did understand that at similar drain and source potential current does not flow and only after applying positive potential to drain, current starts flowing from source to drain. Can anybody explain me the characteristics when drain source voltage is gradually increased and specially its relation with the threshold voltage? I am actually looking for an explanation of the IV curve. More specifically, why increase in drain voltage beyond a certain point saturates the current flow and results in a pinch off?

Thanks