Duty cyle register updating in accordance with the adc feedback Voltage

[thannara123]

The best way to update the PWM duty cycle to achieve the sinewave derived from the H-Brdige What will be the adc feedback capturing frequency in accordance with PWM frequency,
i.e., the time calculation for adc? For example, if the adc conversion takes place every 10 microseconds,
which means the PWM duty cycle will feed every 10 microseconds while the PWM frequency is 16 kHz (only for examplethe filtered output Sinewave frequency will be 50Hz),
what is the relation between the PWM duty cycle feeding and adc conversion time?
More sampling with very high speed may cause problems, or is there any correct calculation from experienced engineers?

sinewave half cycle takes 10 milli second while one adc capture about 250 microseconds

1000/250 = 4
4*10 = 40 capturing in one half cycle ?

How is the theory behind it ?

 

[KlausST]

Hi.

what is the relation between the PWM duty cycle feeding and adc conversion time?

The question is very unclear, so I have to guess. (Why is it so hard to draw a simple sketch? ... even for a long term member.)

I guess
* you want to do SPWM gerneration.
* you want to adjust output sinewave amplitide.
* you have some analog input to adjust amplitude. It may be a pot, or it may be the instantaneous output voltage or it may come from a RMS_to_DC converter ...??? It makes a lot of

In any case I can´t imagine what conversion time has to do with the problem. Conversion time is just the delay between starting a conversion until the digital result is available.

the adc conversion takes place every 10 microseconds,

This means an ADC conversion frequency of 100kHz.

sinewave half cycle takes 10 milli second

so full wave = 20ms --> 50Hz?

one adc capture about 250 microseconds

What is an "ADC capture"?
And how do this 250us match to a conversion rate that is 25 times faster?

1000/250 = 4

Where are these numbers from?

4*10 = 40 capturing in one half cycle

Where are these numbers from?

Klaus

 

[thannara123]

Hi my actual problem is am not well in english . Thats why my question is unclear sorry .

Actually my question is ,
What is the best meathd to of feedback method In sineinverter (like commercial) ?
is it good by a forumal appling instead using look up rable .It saves the memory
If i use look up table
const unsigned char sin_table[416]={
0, 16, 32, 47, 62, 77, 91, 103, 115, 126, 136, 144, 151, 156, 160, 162, 163, 162, 160, 156, 151, 144, 136, 126, 115, 103, 91, 77, 62, 47, 32, 16, //65%

0, 17, 33, 49, 65, 80, 94, 107, 120, 131, 141, 149, 156, 162, 166, 168, 169, 168, 166, 162, 156, 149, 141, 131, 120, 107, 94, 80, 65, 49, 33, 17, //67.5%

Like wise if i use 25% ,26% 27% ...to 100% with having array value 256
there require a lot of memory (aproximately 256 *75 bytes )

is it good or any idea behind it ?

My second Question is
My PWM siganls drive an H-Bridge with a 16khz frequency ,where i get a sine wave with 50 hz after filtering .
I am trying to impliment a feedback with adc to correct the output voltage of the PWM.
How much speed require to variying the PWM dutycycle ? (adc conversion how to synch with pwm and adc)
which mean ADC reads in 1 micro second and changing the duty cycle is so fast
How can i calculate it ?

consider the above values are just taken for only example to understand the question .

Need to synchronize my sample rate with my switching rate to alias the high switching frequency component to DC and also compensate the whole filtering-adc-processing-spwm delay path in my digital implementation , if yes How to achive it .


Plseas excuse me my english

 

[KlausST]

Hi,

You did not answer a single of my questions. "Bad English" is no excuse for this.
I also asked for a sketch .... it's the best way to get around language barriers. But you refused to ...

If you want me to contribute to the discussion ... you have to give clear informations. I don't want to play a guessing game

Klaus

 

[FvM]

In post #1 you are asking about timing details of a digital control loop without actually specifying the controller topology (measured process value, control algorithm). Post #3 asks about implementation of controller manipulated value without clarifying much about open points.

My few cents:
You are controlling an average value, e.g. Vrms, therefore the controller can't be fast. A new measurement can't be available earlier than after 20 ms (under circumstances 10 ms). Control algorithm must be aware of limited process value update rate.

--- Updated Nov 10, 2023 ---

ADC rate must be sufficient to get unbiased rms value with low variance. Sampling pwm synchronous isn't generally necessary, assumed that pwm ripple isn't dominant in ADC input.

--- Updated Nov 10, 2023 ---

I assume that rms processing is performed in software.

 

[thannara123]

In post #1 you are asking about timing details of a digital control loop without actually specifying the controller topology (measured process value, control algorithm). Post #3 asks about implementation of controller manipulated value without clarifying much about open points.

I actually asked in post #1 what is the best method to update the Duty cycle
,is it good one by using look up table .
or
is it good one making a formula like duty-cycle = 0.5 + 0.5*sin(2π*50) // which takes more processor power ?
Here am using stm32 controller sinewave is generated by using look up table ,- And an H-bridge topology used .

Planing to the feed back voltage is connected to the ADC , I didn't decided the how feed the feedback voltage to ADC . is it good one by giving as RMS value with a time constant RC filter
,is there any other type ?

My few cents:
You are controlling an average value, e.g. Vrms, therefore the controller can't be fast. A new measurement can't be available earlier than after 20 ms (under circumstances 10 ms). Control algorithm must be aware of limited process value update rate.

Is there should give some delay after PWM for gathering adc feedback voltage ,is it minimum 10 milli second ? (this is the my actual doubt - aim of this thread )

I assume that rms processing is performed in software.

Sir how to do it ? i didnt get well?

 

[doraemon]

Hello!

Hi my actual problem is am not well in english . Thats why my question is unclear sorry .

For this very reason I would agree with Klaus. If you don't feel confident about your english,
why not make a drawing, a block diagram of your system?
There is no "best way" to update a PWM. There is just a way to do it, which is processor-dependent.
You don't explain the background, I just understand that you want to make some kind of PWM in relation
to a sine wave or something like that.
I'm not sure whether you want to make a servo loop ending with a PWM to feed to some motor,
in which case you may want to measure the analog value corresponding to this PWM or whether
you want to make the PWM itself from an array of data.
So I will try to think about it as soon as there is a clear explanation with a drawing.

Dora.

 

[thannara123]

sir I ma designing a sine wave inverter , what drawing i have to draw
My plan is follows
I have a micro controller (stm32 Based )
I am using an advanced timer and its 2 PWM output 2 of complimentary of the 2 .
These 4 PWM output drive an H-Bridge after H bridge there is an inductor which give a smooth sine wave after filtring
After filtering the output , a part of the output is connected to the ADC as a feedback it may be after rectified(Isolation with an opamp). or like this circuit Click here

 

[doraemon]

Hello!

The drawing you give us doesn't correspond to your questions. Why not giving us the picture of your
cat or dog? Your questions are related to PWM, ADC, etc, which hints to a microcontroller-based system
of some kind. Here you show us a simple amp.
Where is the PWM unit? Where is the ADC? Where does the "ADC feedback voltage" go from / to?
Where is the STM32?

Sorry, I can't help you with so few information. Try to google "STM32 inverter schematic and source code".

Have fun!

Dora.

 

[thannara123]

I got the solution Here
Thankyou all

 

[D.A.(Tony)Stewart]

Normally I start with design spec limits for;

1. control tolerances, { frequency, phase, amplitude % harmonic distortion}
2. added cost of Mfg for error correction from budget of CPU time, memory, added hardware
3. latency for error correction.
4. fault detection/ correction
5. Testability

Was this for a UPS when power fails or an "Off-grid inverter" using grid as a variable f sine source

--- Updated Nov 11, 2023 ---

here's some more search results https://scholar.google.ca/scholar?as_ylo=2019&q=pwm+inverter+design&hl=en&as_sdt=0,5