Not sure where you got this schematic but trace impedance must be low.
50 Ohms means trace width/depth to gnd plane ~ 2:1
OSRAM Laser incremental impedance = 0.2V/10mA at 90 to 100mA thus Laser ESR = 2 Ohms thus series Rs=2 Ohms for matched impedance not shown in your model which is only accurate at low Vf before full saturation will improve over/undershoot current response. 50 Ohm +5 pF shunt matches 50 Ohm microstrip 2cm trace to 5pF shunt for transient matched impedance for best step response during conduction start then series Rs to LED ESR match for full conduction impedance match. RC=250ps indicates response time limiting for equally or faster driver for signal integrity in eye pattern at fastest bit rate.
However Cortex specs are" All I/Os are CMOS and TTL compliant." not laser diode compliant, thus Laser driver with proper source impedance is necessary.
Table 49 in datasheet says Iio=20mA @ 1.3Vmax @Vdd=3.6 thus ESR = 1.3V/0.02A= 65 Ohms max ( 25~50 Ohm typ is what I recall)
Consider OSRAM operating nominal point is 100mA @ 5.8V you need to control current accurately with 2 Ohm ESR + wide tolerances expected. Thus adding 2 Ohms in series results in expected 200mV drop from 5.8V thus 6V minimum needed and perhaps up to 7V+0.2V due to variance of ESR of Diode. and then consider Max Pd of diode for pulse duration. and duty cycle. 7Vmax @ 145mA max implies rise of (7-5.8)V/ (145-100)mA =26 Ohms worst case. hence very wide ESR range demands controlled current source into 10 Ohm/5pF source load to create a low voltage source impedance with regulated current.
You must specify your datarate, loss budget and all path impedances from source to load PD to define slew rate skew and resulting jitter of data and BER result to ensure measurable communication performance parameters and result in good BER for path loss budget and interference.
I never used PPM format, but I understand it works well up 50Mbps which is beyond STM32 capacity I think.
"The receiver consisted of a maximum likelihood PPM detector and a timing recovery subsystem. The PPM slot clock was recovered at the receiver by using a transition detector followed by a PLL. The PPM word clock was recovered by using a second PLL whose input was derived from the presence of back-to-back PPM pulses contained in the received random PPM pulse sequences.
"50 Mbps free space direct detection laser diode optical communication system with Q = 4 PPM signaling."
Do not start with specific restrictions on hardware encoder/decoder until you define all communication parameters including LED driver , TIA receiver, clock and data recovery PLLs.. Do a block diagram and try to define each block necessary to send and receive data, bit sync, word sync, frame sync, Loss of signal, loss of sync, etc.
i.e. make a detailed functional design spec first ( few pages) then decide how to do.
(but choices so far seem reasonable but incomplete)
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And I have another question, My STM32F407 can drive MAX3701?
MAX3701 is obsolete and replaced with MAX3711 is perhaps overkill for your needs.
Look at CML for drivers.