DRCs in signoff tool which are not seen in PNR tool

[anil4sat]

Hi All,
Can anyone tell me what are the DRCs which will be appear in signoff tool which are not shown in Place and route tool ?


Thanks in advance
Anil

 

[rca]

Some possible explanations:
1. the std-cell/memories/pad/... lef miss some details.
2. the techno lef which contains the technology rule are not align with the latest technology information (used by the Signoff DRC tool)
3. P&R tool bug or unwanted options blind the DRC
4. P&R tool only checks metal&via layers

 

[anil4sat]

Hi rca,
Thank you for the reply. As gds is the input to the signoff tool the errors which are related to material (active,implant,poly etc) will come in to picture.
But i want to know the list of errors which will be appear in sign off tool which are not appear in pnr tool.

Pls help me in this

Thanks in advance
Anil

 

[rca]

you could load in Encounter the DRC data base generated by the main signoff drc tool (like calibre-...), and in the violation browsert of Encounter you selected only the metal/via layer violations.
is it what you request?

 

[GI]

Hi anil4sat,

Most Place and Route tools operate on abstract views (e.g. LEF abstraction), therefore base layers & some internal geometries will not be seen by Place and Route tool. Also if you do top level assembly outside the Place and Route tool, you may not see Alucap & RDL layers present in the design, and so the DRC errors related to them.

Please find below some violations you may see at Signoff;

1 - Latchup errors
2 - nwell, deep nwell and other base layer related DRC violations (spacing, enclosure, etc...)
3 - If you are working on a top level design, and you assemble the top level after you export design from Place and Route tool, you may see some Alucap/RDL related DRCs at Signoff (e.g. vias/bumps related to Alucap & RDL layers)
4 - If you don't do metal filling in Place and Route tool, and you check DRC at Signoff without doing metal filling, you will see metal density violations in Signoff.
5 - And others that do not fill in above categories.

I hope it helps,
BR,
Gokhan
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[design_oriented]

The DRC error differences between PNR tool and signoff tool depend on the quality of your LEF file (for SOC flow). If you start seeing enclosure errors, spacing errors, etc. in your PNR tool flow but not in your DRC signoff tool, it is a good idea to check your LEF file to see if all the rules are coded correctly. The PNR tool performs routing, optimization, etc. based on the rules specified in the LEF file.
Some errors that may show up in the DRC signoff tool but not in PNR are the GR999xx errors. Try making the FULL CHIP environment variable false in the DRC rules file.

 

[raju3295]

there are many type of drcs, which are not coded in the tech lef files given to the pnr tool , like end of line spacing violations.
and the abstract views will be given to pnr tools may not have the full metal information,

 

[brs2k4]

Firstly, as PNR tools deal Metal layers, any violations seen in Base Layers (like Poly, OD etc.) will not be seen by PNR tools.

Secondly, for Metal layers there could be violations like Manufacturing grid (off-grid) violations, Metal Density, Via Enclosure etc. will not be seen by PNR tools.