shankar
Junior Member level 1
hi
i am in need of DRC rules. i have been given the information that only fabs can give these set of rules. i want to perform drc for my design and layout. if any of you guys can provide me with a sample cmos library of say 0.35u process it will be very helpful. and also pls let me know if i need to change the contents of the file to suit the needs of the tool. say cadence, synopsys
i am in need of DRC rules. i have been given the information that only fabs can give these set of rules. i want to perform drc for my design and layout. if any of you guys can provide me with a sample cmos library of say 0.35u process it will be very helpful. and also pls let me know if i need to change the contents of the file to suit the needs of the tool. say cadence, synopsys