Dec 28, 2011 #1 S snehalg Newbie level 4 Joined Jul 4, 2011 Messages 5 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,313 how can we achieve the down sampling in FPGA ?Is there any IP core available?
Dec 28, 2011 #2 milind.a.kulkarni Advanced Member level 3 Joined Oct 6, 2011 Messages 922 Helped 214 Reputation 428 Reaction score 208 Trophy points 1,333 Location Bangalore Activity points 7,448 Simple way is two creat two fifo and apply the bilinear interpolation on that..... Good Luck
Dec 28, 2011 #3 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,400 Helped 14,748 Reputation 29,778 Reaction score 14,093 Trophy points 1,393 Location Bochum, Germany Activity points 298,004 CIC decimation filters are a simple way.