Does Xilinx XST understand VHDL configuration delcaration?

[gongdori]

Hi all,

My VHDL code contains configuration declaration. When I tried to compile the design using SXT, it failed because it couldn't find the component I binded using the "configuration" statement.
I wonder if anyone experienced the same thing. If so, how did you fix the problem?
Thanks,

configuration my_config of module_top is
for struct
    for module_A_inst : module_A
        use entity work.module_A_1(rtl)
    end for;
end for;

Gongdori

 

[ReComm]

These Statements are used to direct the compiler to right entity and Architecture

what about to comment them and compile your small entity of module_A before your upper unit.