hi
i want to ask if verilog language support the multiplication operator for bit_vector, integers. then what is the fun of making new architectures of multipliers(booth,braun,wallace,dadda)like this.
I'm not sure what a bit_vector is, but Verilog certainly has a convenient '*' multiply operator. It simplifies our lives by letting the synthesis tool choose the best multiplier for the target device. I have no interest in re-inventing multipliers! Also, modern FPGAs have built-in multiplier blocks that are much more efficient than multipliers implemented in the logic fabric.
Of course, if your job is to design a new improved multiplier block, then that's a different matter.