Aug 24, 2009 #1 W wilsons Newbie level 3 Joined Apr 17, 2009 Messages 4 Helped 0 Reputation 0 Reaction score 0 Trophy points 1,281 Activity points 1,304 verilog arrays Does Verilog-A support arrays assigment? Is there a method to assign an array in a single statement. For example, a<3:0>={1,0,1,0} and suppose 1,0 is a specified level. Thanks for your help!
verilog arrays Does Verilog-A support arrays assigment? Is there a method to assign an array in a single statement. For example, a<3:0>={1,0,1,0} and suppose 1,0 is a specified level. Thanks for your help!