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does this constant voltage reference work properly?

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yikwon

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I need a voltage reference(1.5V). so, i designed reference circuit.
(*refer to attached file)

I'm wondering that this circuit is right operation or not. because vdsat is about 55mV but (vgs-vth) is -50mV so i think this Transistor is in triode region. therefore in my opnion, this circuit is not work. how do you think about that?

(*we can only use current under 50nA.)

pls. anwser me.
 

if |Vds|>|Vdsat|, and (Vgs-Vth)<0(for PMOS), the transistor is work in saturation region. you can see if the Vds is less than -55mV
 

What accuracy do you need? There are 3 pin regulators available from Microchip that are 1v5 at 1% tolerance. You could also use a TLV431 (low voltage version programmable zener) with programming resistors.
 

How can you prove that vo is constant voltage?
There are lots of regulator in the textbook, like David Johns and Paul R. Gray.
 

dodoro said:
if |Vds|>|Vdsat|, and (Vgs-Vth)<0(for PMOS), the transistor is work in saturation region. you can see if the Vds is less than -55mV

thank you for your reply.

I mean NMOS is in triode region. as you see, vgs=623mV, vth=695mV therefore
vgs-vth <0. is this wrong?

Added after 3 minutes:

nxing said:
How can you prove that vo is constant voltage?
There are lots of regulator in the textbook, like David Johns and Paul R. Gray.


thank you for your reply.

this circuit can be generated constant voltage. Of cause, there are differential amplifier after this circut. it is only used voltage reference for regulator.
 

yikwon

BTW, how can I backnote the OP data like Vth, Vdsat, just like shown on the top picture?

Is this a new feature of Cadence which need other license?

Added after 7 minutes:

normally when vgs<Vth , it is in weak inversion area, actually subthreshold now. It still works.

If you current is only 50nA, that is the only area device can work
 

I think all transistors are in saturation. Just check ur question. Vdsat=Vgs-Vth. Vds should be greater than Vdsat in order to keep transistor in saturation. Here all transistors have Vds greater than Vdsat. so all are in saturation.
 

waxtomato said:
yikwon

BTW, how can I backnote the OP data like Vth, Vdsat, just like shown on the top picture?

Is this a new feature of Cadence which need other license?

Added after 7 minutes:

normally when vgs<Vth , it is in weak inversion area, actually subthreshold now. It still works.

If you current is only 50nA, that is the only area device can work


you can find this annotation function in ADE (Analog Design Enviroment)
just select as below
* ADE -> Results> Annotate > DC operating points

what does that mean "area device can work" ?

thank you.

Added after 6 minutes:

satyasiva said:
I think all transistors are in saturation. Just check ur question. Vdsat=Vgs-Vth. Vds should be greater than Vdsat in order to keep transistor in saturation. Here all transistors have Vds greater than Vdsat. so all are in saturation.


as you see NMOS (M219, M218), vgs=623mV, vth=695mV
vgs-vth=-72mV , that is minus so i think it is in triode region.

and then , when i check the TR operation region using ADE's calculation fuction,
3 is displayed.
(where, number mean 0,3= triode region
2= saturation region)

* this TR's channel length is 10um, therefore this is not short channel length.
why vds ands vgs-vth is not equal? I used TSMC 0.18um process (1P6M)
 

They are in sub-threshold region because current is as small as 28nA.
 

can you tell me how this circuit work? And how the output voltage can be constant?
 

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