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does someone knows how to use clock in veriloga?

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code?

Hii
does someone knows how to use clock in veriloga
i need to do the simulation by giving a frequency of 100hz
am new to this thing,so would be nice if someone tells

you can take my program as this(example)
`include "disciplines.vams"
module equation(y,x);
output y;
input x;
voltage x,y;
analog begin
V(y)<+V(x)
end
endmodule

i know theres no need for clock in above,,but just explain how i would write syntax,if i need to make simulation for above program with 100Hz clock,,the code for that..(at falling edge of clock)

thank you
 

you need to use the cross function, for example, in your code you need to add:

input clk;
voltage clk;

and in the analog block

@cross(V(clk),-1)
do something...

The -1 is for falling edges, 0 is for either edge, 1 is for rising edges.
Moreover, if your clock does not cross zero, you need to:

@cross(V(clk)-0.5,-1)

...if your clock is between 0 and 1.
You might also want to check:
**broken link removed**

Added after 1 minutes:

...page 6-11
 

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