Does post-layout simulation make design more accurate?

Status
Not open for further replies.

tsinghua

Full Member level 4
Joined
Dec 30, 2003
Messages
222
Helped
23
Reputation
46
Reaction score
3
Trophy points
1,298
Activity points
1,111
assura post-layout simulations

In my mixer design at 2.4 GHz, the input matching of the RF port is very good during pre-layout simulation. After the layout is finished, I used Assura to extract parasitic RC and generate extracted view. The post-layout simulation shows that the input matching of the RF port deteriorates. Simple layout modification does not improve the input matching. Should I change the schematic design according to the post-layout simulation results? Or do something to the layout?
 

rf post layout simulation

My opinion would be to fix the layout.
 

I think you should change the layout to get it working, but first make sure the extractor is working well (it extracts the parasitics correct). I have seen some extraction deck files of assura with nonsense parasitics. Sme thing like the value of a capacitance between metal1 to substrate being lower than a capacitance of metal5 to substrate.

Generate first a testbench to check the most important parasitics.

bastos
 

YEs, improve the layout. At high frequencies you don't have to rely only on the pre-layout simulations.
 

When there is great different between the pre-simulation and post-simulation, which could doubt among the circuit design, layout design, and the models? 8)
 
Reactions: deexth

    deexth

    Points: 2
    Helpful Answer Positive Rating
Youi should consider the parasitic effect during circuit design first. After layout is finished, you should back-annotate the real parasitic value into your circuit for post-layout verification. Some fine-tuning and iterations between circuit & layout is necessary.
If possible, some metal option should be reserved on layout just in case the models provided by foundary vendor is not accurate enough.

Hop it helps : )
 

First of all, you should find which parasitic or secondary effect deteriorate your matching. Then you should consider that effect and re-design your circuit. besides based on your approach for layout, you can give better parasitic capacitance model to your simulator during pre-layout simulation. After another pre-layout simulation do post-layout simulation. You will find that your second post-layout simulation has better results. If you repeat this loop more , you will get very good results.
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…