Dec 6, 2009 #1 O ohenri100 Junior Member level 1 Joined Apr 15, 2008 Messages 15 Helped 1 Reputation 2 Reaction score 1 Trophy points 1,283 Activity points 1,377 Hi all, I studied Verilog and VHDL. I know this document is best for beginner. Document is write very detail and standard. http://hotfile.com/dl/19674291/69dc782/Evita_verilog.rar.html
Hi all, I studied Verilog and VHDL. I know this document is best for beginner. Document is write very detail and standard. http://hotfile.com/dl/19674291/69dc782/Evita_verilog.rar.html