nidahas
Junior Member level 2
verilog division
hi!!
i a writing a code in verilog which involves the use of division operator.the code works fine if i check it for syntax or for simulation purposes but gives an error if i synthesize it.it says tha division operatation cannot be done.
i f somebdy can guide me how to go about division.
any help is appreciated.
thanks
hi!!
i a writing a code in verilog which involves the use of division operator.the code works fine if i check it for syntax or for simulation purposes but gives an error if i synthesize it.it says tha division operatation cannot be done.
i f somebdy can guide me how to go about division.
any help is appreciated.
thanks