Disatrous problem intrinsic to DC restored transformer gate drives.

This whole problem of isolated gate drive could be simplified if your main switching device was a P channel device instead of an N channel device.

I have on occasion successfully used a high side driver circuit like this, which is a Warpspeed invention:



Fast high current gate drive is via the 100nF coupling capacitor and a "grunty" gate driver chip.
A very weak dc coupling path runs in parallel with that, to ensure the gate is truly dc coupled.

Warpspeed said:

This whole problem of isolated gate drive could be simplified if your main switching device was a P channel device instead of an N channel device.

I have on occasion successfully used a high side driver circuit like this, which is a Warpspeed invention:

View attachment 124427

fast high current gate drive is via the 100nF coupling capacitor and a "grunty" gate driver chip.
A very weak dc coupling path runs in parallel with that, to ensure the gate is truly dc coupled.

Click to expand...

This looks like a better approach which avoids the magnetic frequency response issues with step DC changes.

I see several factors for Gate turn on and off and wonder how critical a choice you discovered for Q1, C15 and diode on recovery time to step response on duty cycle. from 1 to 0.

This is good @warpspeed . Classic level shifter with 12V swing and x1 R ratio gain.

Startup surge current limited by Zener diode ESR may be a bit severe and power sequence must be checked.

SunnySkyguy said:

Startup surge current limited by Zener diode ESR may be a bit severe and power sequence must be checked.

Click to expand...

Yes, the whole thing needs to be thought right through, and tailored to the application.
But it has worked very well for me, and been used in mass produced commercial products without any dramas.

I thought of this almost twenty years ago, and have never seen it used elsewhere.

Re: Disastrous problem intrinsic to DC restored transformer gate drives.

Hello,
Concerning wide duty cycle transformer isolated fet gate drives, I have reviewed the alternative method offered by Qiang et al (link below).

As the LTspice simulation (attached) shows, this method does not stop the problem of the FET gate being held on for several switching periods when it should be OFF. When the duty cycle suddenly goes to zero, as can be seen, the FET gate-source voltage lingers high for far too long.
Also, the method given by Qiang, results in a relatively slow turn off of the FET.

Also, as can be seen with the overly excessive ringing at the start, this method appears to need a lot of damping, which isn’t welcome with high speed FET gate drive circuits.
Also, when the duty cycle is low , the FET M1 (in the sim) needs to have a very low Vgs(th), this is a problem because FET Vgs(th) is often very variable.

“An Improved Isolated MOSFET Gate Driver Scheme for Wide Duty Cycle Applications”
By Tong Qiang
**broken link removed**


@Flapjack from post#20: Thanks for linking it, but that method , as you know, unfortunately results in big loss in drive voltage level as duty cycle increases.

I think this option has more potential if you reduce the coupling capacitors and apply more damping.

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Measurements on a breadboard test circuit also look promising.

Trace one is the primary drive signal and lower trace measured on the gate of main FET.

Have you guys ever stopped to think about how International Rectifier do this inside their ubiquitous IR2110 ?

No transformers, no opto isolators, true dc coupled isolated gate drive, and pretty damned fast.

The IR2110 does not have any gate driver isolation.

Thanks E-design.
However, I would point out that your modification circuit relies on having the very low series damping resistance of 1 ohm……the driver output itself could be several ohms, and with that extra damping, Qiang’s circuit starts falling over.
Also, the modification you kindly provide also suffers too low vgs voltage at low duty cyle.
Also, your damping is great but does need the 100uF damping cap.

Have you guys ever stopped to think about how International Rectifier do this inside their ubiquitous IR2110 ?

Click to expand...

Thanks Warpspeed.
True, but in this case, we are dealing with converters in which the switching node transitions at >50v/ns, which , as you will know, means no bootstrap driver can manage. (also, its for a 170degc ambient application and we don’t have performance data for any bootstrap driver under those conditions, so cant use them)

You can experiment with this circuit. Simulation results look good. Trace is on M2 gate.

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Gate signal when the transformer is modeled with leakage inductances.

Plot for low duty cycle operation.

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This seems to cope well with a reasonable driver Rout. The 100 Ohm is just to limit the scale.

I had some time to verify proper operation with a real circuit. It confirms the simulation results. Trace 1 is the drive into the transformer, and lower trace is the gate signal. Scale is 2.5 V/div. Duty cycle is at 90%.

E-design, i am having trouble understanding your circuit. In post 30 you seem to be modelling a controller chip with the totem output connected thru a capacitor to the gate drive transformer, with your capacitor dampened with a RC network.

In post 31 you seem to have changed the controller chip model but show no connection to a gate drive transformer or the secondary side of the gate drive.

Post 30 shows the proposed solution. Member treez had a concern before that the driver output impedance may be too high to make it usable.

However, I would point out that your modification circuit relies on having the very low series damping resistance of 1 ohm……the driver output itself could be several ohms, and with that extra damping, Qiang’s circuit starts falling over.

Click to expand...

Post 31 is just to evaluate the output impedance and to indicate that it does not seem to be a problem with the proposed circuit.

I think the confusion came, how the board adds new messages to old ones before, so it grouped the gate drive waveform with the impedance test.