Digital Design of Integrator

[njr@1]

Dear all,

I wanted to how is the Integrator designed digitally ?
Does it have a loop or just a feed forward structure ?

Thank you

 

[shaiko]

Every new sample is registered and accumulated to the history of older samples.
T(x) - x is the number of clock cycle.

at T(0)
Integrated result = sample_0

at T(1)
Integrated result = sample_1 + sample_0

at T(2)
Integrated result = sample_2 + sample_1 + sample_0

And so on...