# [SOLVED]Digital counter question

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#### random_duck

##### Newbie level 4
Hi all,

Attached is a question, which I cannot figure out.

Any idea on what the counting sequence is for this? Thanks in advance.

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##### Super Moderator
Staff member
Did you even try analyzing the circuit before posting your homework on the forum?

Use an arbitrary output value on Q0-Q3 and !RCO, feed them back to the inputs and see what the next value would be after a clock occurs. Repeat, until the sequence repeats.

#### random_duck

##### Newbie level 4
Did you even try analyzing the circuit before posting your homework on the forum?

Use an arbitrary output value on Q0-Q3 and !RCO, feed them back to the inputs and see what the next value would be after a clock occurs. Repeat, until the sequence repeats.

Of course I did try. This isn't homework actually, I am studying for finals, and it was the only question out of a set which I couldn't solve.

I think it might be counting like this, but I am not too sure.

7,6,5,4,3,2,1,0,7,6,5,4...

What do you think?

##### Super Moderator
Staff member
7,6,5,4,3,2,1,0,7,6,5,4...

What do you think?

No, it doesn't count that way. You have to carefully read the 74169 counter datasheet (the datasheet is pretty bad).

Here are the connections based on the schematic:
Code:
[FONT=Courier New]up_dn_b == q3
ld_b == rco_b (rco_b == 0, when q[3:0] == 0 && up_dn_b == 0 || q[3:0] == 4'b1111 && up_dn_b == 1)
d3 == !q3
d2 == q2
d1 == q1
d0 == q0[/font]

ld_b has priority over up_dn_b
Try looking at these first two lines of the sequence and try again, if you still can't get it I'll post the entire sequence.
Code:
[FONT=Courier New]Assuming an initially condition:
(q[3:0] == 0000; so rco_b == 0 as up_dn_b == 0)
outputs  |      inputs
q3:0 rco_b | up_dn_b ld_b d3:0
0000  0    |    0     0   1000
1000  1    |    1     1   0000
...
...[/FONT]

#### random_duck

##### Newbie level 4
No, it doesn't count that way. You have to carefully read the 74169 counter datasheet (the datasheet is pretty bad).

Here are the connections based on the schematic:
Code:
[FONT=Courier New]up_dn_b == q3
ld_b == rco_b (rco_b == 0, when q[3:0] == 0 && up_dn_b == 0 || q[3:0] == 4'b1111 && up_dn_b == 1)
d3 == !q3
d2 == q2
d1 == q1
d0 == q0[/font]

ld_b has priority over up_dn_b
Try looking at these first two lines of the sequence and try again, if you still can't get it I'll post the entire sequence.
Code:
[FONT=Courier New]Assuming an initially condition:
(q[3:0] == 0000; so rco_b == 0 as up_dn_b == 0)
outputs  |      inputs
q3:0 rco_b | up_dn_b ld_b d3:0
0000  0    |    0     0   1000
1000  1    |    1     1   0000
...
...[/FONT]

Thanks once again.

I tried tracing it again, following on from your values, and got this:

0,8,9,10...15,7,6,5,4...0,8...

Is this correct? I hope I haven't made a mistake somewhere.

##### Super Moderator
Staff member
That's exactly what I got. You probably got messed up with the load and up/down signals and the tricky use of the ripple-carry-out previously.

Oh yeah, Good luck on your final exam.

#### SunnySkyguy

Since msb controls count direction 1=up,0=dn
RCO terminates the count at $f for up and$0 for dn
and msb toggles every up/down change.

I would have said.
8,9,a,b,c,d,e,f,7,6,5,4,3,2,1,0... repeating 16 counts.

#### random_duck

##### Newbie level 4
That's exactly what I got. You probably got messed up with the load and up/down signals and the tricky use of the ripple-carry-out previously.

Oh yeah, Good luck on your final exam.

Yeah something along those lines. My understanding was a mess - I clearly wasn't following it through correctly, but your table showed me how to trace the steps in a proper methodical way. Now I am pretty sure that I can apply the same principles to solve any similar question that might come up in the exam.

Since msb controls count direction 1=up,0=dn
RCO terminates the count at $f for up and$0 for dn
and msb toggles every up/down change.

I would have said.
8,9,a,b,c,d,e,f,7,6,5,4,3,2,1,0... repeating 16 counts.

Thank you for confirming the solution.

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