Currently I use power compiler to do post layout power esimation of my block.
ie use the SOCE netlist and do post layout simulation to generate vcd/saif.
annotate the vcd/saif to power compiler along with the netlist, sdf to report power.
is there any more accurate method apart from doing spice?
Certainly you will have a better waveform, but what is your goal, and accuracy you want, and for complex system, with program... It is near to impossible.
Certainly you will have a better waveform, but what is your goal, and accuracy you want, and for complex system, with program... It is near to impossible.